LGA 1155 § Original Sandy Bridge chipsets, LGA 1151 § Coffee Lake chipsets (300 series), "What is a Chipset? Coleto Creek is the codename of the PCH most closely associated with Highland Forest platforms and Ivy Bridge-EP[17] processors. [13] Patsburg was then used for the Sandy Bridge-EP server platform (the platform was codenamed Romley and the CPUs codenamed Jaketown, and finally branded as Xeon E5-2600 series) launched in early 2012.
Some small Chinese manufacturers are producing LGA 1156 motherboards with H61 chipset. The FDI is used only when the chipset requires supporting a processor with integrated graphics. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics.
It connects to the processor via PCI-E (vs. DMI as other PCHs do). )", "Breaking the Speed Barrier: The Frontside Bus Bottleneck", "The AMD TRX40 Motherboard Overview: 12 New Motherboards Analyzed", "AMD X570 vs. X470, X370 Chipset Comparison, Lanes, Specs, & Differences", "On-Package PCH, The First Single Chip Haswell: The Haswell Ultrabook Review: Core i7-4500U Tested", "Correction: Ivy Bridge and Thunderbolt - Featured, not Integrated", "Intel Xeon/Core/Pentium/Celeron, Communications Chipset 89xx", "Intel Xeon Processor E5-2600/E5-2400/Communications Chipset 89xx", "A Look Into Intel's Next Gen Enthusiast Platform : Sandy Bridge E & Waimea Bay", "Intel plugs both your sockets with 'Jaketown' Xeon E5-2600s • The Channel", "Ivy Bridge-E Not a Cut-down 8-core, 20 MB LLC Die", "Intel carves up Xeon E5-2600 v2 chips for two-socket boxes", "Intel Announces Highland Forest, a New Platform that will Accelerate Network Transformation", "Leaked Intel slides detail Haswell's Lynx Point chipset", "Intel "Lynx Point" 8-series Chipset Detailed, Completely SATA 6 Gbit/s", "New Intel chipsets speed up your storage, but they're missing new CPUs", "Lynx Point USB 3.0 Controller Issue Correction Needs New Hardware", "Intel Readies 18-Core Xeon "Broadwell-EP" Microprocessors for Launch in 2015 – Report", "Intel Outs Z390 & X399 PCHs for Cannon Lake & Coffee Lake CPUs", Intel Communication Streaming Architecture, Advanced Programmable Interrupt Controller, High-bandwidth Digital Content Protection, https://en.wikipedia.org/w/index.php?title=Platform_Controller_Hub&oldid=978882372, Wikipedia articles in need of updating from January 2019, All Wikipedia articles in need of updating, Articles with obsolete information from December 2012, Creative Commons Attribution-ShareAlike License, Bogus USB ports will be detected by desktop PCHs equipped with 6 USB ports (3420, H55) on the first EHCI controller.
Whitney Point is the codename of a PCH in the Oak Trail tablet platform for Atom Lincroft microprocessors. プラットフォーム・コントローラー・ハブ (Platform Controller Hub, PCH) は、2008年ごろから導入されているインテルによるチップファミリーの1つである。PCHは、Intel 5シリーズから登場し、ノースブリッジとサウスブリッジを用いていたインテル・ハブ・アーキテクチャの後続である。, PCHはいくつかのデータパスを管理し、Intel製CPUの機能のサポートする役割を果たしている。これらの機能には、システムクロック、Flexible Display Interface (FDI)、Direct Media Interface (DMI)が含まれる。ただしFDIはGPU統合プロセッサのサポートにしか使われない。このように、I/OにおけるチップセットとCPUの関係は以前のアーキテクチャから見直されている。メモリコントローラやPCIレーンなどの以前のノースブリッジの機能のいくつかはCPUに統合され、PCHは残りのノースブリッジの機能と伝統的なサウスブリッジの機能を併せ持っている。, PCHアーキテクチャはインテルによる以前のハブアーキテクチャを継承しつつ、プロセッサ・マザーボード間で次第に問題になりつつあったパフォーマンスボトルネックを解消するようデザインされている。時間とともに、CPUの速度は増加し続けたが、フロントサイドバス(FSB, CPUとマザーボード間の接続)の帯域幅はそうではなく、結果としてパフォーマンスボトルネックに繋がっていた。, 以前のハブアーキテクチャでは、マザーボードはノースブリッジとサウスブリッジからなる2種類のチップセットを搭載していた。ボトルネックへの解決策として、いくつかの伝統的にノースブリッジやサウスブリッジに属していた機能は再配置された。ノースブリッジは完全に廃止され、メモリコントローラと拡張カード用のPCI Expressレーンの機能は完全にCPUダイ・パッケージに統合された。, PCHは残りのノースブリッジの機能（クロックなど）をサウスブリッジの機能と足しあわせたものである。システムクロックは以前は接続であったがPCHでは完全に融合している。Flexible Display Interface (FDI)とDirect Media Interface (DMI)の2つの異なる接続がPCHとCPUの間に存在している。FDIはチップセットがプロセッサの統合グラフィックスをサポートする必要がある場合にのみ用いられる。Intel Management Engineは同様にNehalemプロセッサおよび5系のチップセットからPCHに移動させられた。, ノースブリッジがCPUに統合されたことで、チップセットに必要とされる帯域幅は緩和された。, https://ja.wikipedia.org/w/index.php?title=プラットフォーム・コントローラー・ハブ&oldid=73241660. The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. [19], The following variants are available:[20], In addition the following newer variants are available, additionally known as Wildcat Point, which also support Haswell Refresh processors:[21], A design flaw causes devices connected to the Lynx Point's integrated USB 3.0 controller to be disconnected when the system wakes up from the S3 state (Suspend to RAM), forcing the USB devices to be reconnected although no data is lost. [1], The PCH architecture supersedes Intel's previous Hub Architecture, with its design addressing the eventual problematic performance bottleneck between the processor and the motherboard.
The Intel 5 Series chipsets were the first to introduce a PCH. In the first month after Cougar Point's release, January 2011, Intel posted a press release stating a design error had been discovered.
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